Neil M. Zimmerman, William H. Huber, Akira Fujiwara, Yasuo Takahashi, "Excellent Charge Offset Stability in a Si-Based Single-Electron Tunneling Transistor", Appl. Phys. Lett. 79, 3188 (2001).

Description:

NIST researchers have identified a possible solution to the long-standing problem of charge-offset drift in single-electron tunneling (SET) devices. These devices use nanoscale tunnel junctions to monitor or control the motion of single electrons. This depends on the physics of the Coulomb blockade, which only occurs in tunnel junctions with ultra-small capacitance, and thus nanoscale dimensions.

Charge offset drift refers to the fact that, over times of order hours or days, the motion of defects in the device causes the operation of the device to drift away from the correct value. As an example, if one were to use such devices for memory, the drift is equivalent to turning a "0" into a "1", or vice versa. After considerable effort at NIST on a wide variety of geometry and material science approaches, this problem proved intractable for the most commonly used metal devices, based on aluminum and aluminum oxide. In recent collaborations with researchers from NTT in Japan, NIST scientists demonstrated that this charge-offset drift was not present in a silicon-based device. Work continues to identify what crucial features of the silicon devices or their fabrication make their drift at least one thousand times smaller than the metal ones.
 

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