Nanopicture of the Day

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June 12, 2004

Memory Dot

Source:  Sandip Tiwari

      References:

"Room temperature operation of a quantum-dot flash memory" Welser, J.J.; Tiwari, S.; Rishton, S.; Lee, K.Y.; Lee, Y. Electron Device Letters, IEEE, Vol.18, Iss.6, Jun 1997
Pages:278-280

Description:

Above is an SEM of a quantum-dot memory structure possessing single/few electron storage sensitivity.  This flash-memory device has been fabricated and demonstrated at room temperature by coupling a self-aligned, sub-50-nm quantum dot to the channel of a transistor on a silicon-on-insulator (SOI) substrate. Large threshold voltage shifts of up to 0.75 V are obtained for small erase/write voltages (13 V) at room temperature. At 90 K, evidence of single electron storage is observed. The small size of this device is attractive for achieving high packing densities, while the relatively large output current (100 nA-μA's), low off-state current (10 pA), and simple fabrication, requiring only minor variations in standard processing, make it suitable for integration with current silicon memory and logic technology
 

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